Reconfigurable System on Chip (822H1)
Note to prospective students: this content is drawn from our database of current courses and modules. The detail does vary from year to year as our courses are constantly under review and continuously improving, but this information should give you a real flavour of what it is like to study at Sussex.
We’re currently reviewing teaching and assessment of our modules in light of the COVID-19 situation. We’ll publish the latest information as soon as possible.
Reconfigurable System on Chip
Module 822H1
Module details for 2024/25.
15 credits
FHEQ Level 7 (Masters)
Module Outline
This module introduces reconfigurable electronics, such as FPGAs, and their use to realise "Systems on Chip": digital circuits that comprise a multitude of functions such as processors, memories, digital logic, and peripheral interfaces, all realised on a single silicon chip. The module will show for which types of applications a System on Chip approach is beneficial. Students will learn the methodology used to design a system in, for example, VHDL or Verilog (industry standard hardware description languages) and translate it to a functional circuit on an FPGA including testing using state-of-the-art industrial electronic design automation (EDA) tools. This module requires prior knowledge of digital electronics.
Module Topics:
• VHDL
• VHDL Architectures
• Advanced Test benches
• Peripherals
• Soft core processor
• Hardware/Software co-design
• Memory
The syllabus covers the following AHEP4 Learning Outcomes:
M1, M2, M3, M4, M5, M6, M7, M12, M13, M16, M17
Library
1. Appropriate on-line material available with the EDA tools.
2. Pellerin, D & Taylor, D, 1997, VHDL Made Easy!, Prentice Hall
3. Sjoholm S and Lindh L, 1997. VHDL for Designers, Prentice Hall.
Module learning outcomes
Develop an advanced level of skills via a top-down design flow approach to reconfigurable systems, implemented with industrially relevant set of EDA tools
Acquire a good working knowledge of reconfigurable system design, relevant to theory as well as to industry standard EDA tools
Apply the knowledge learnt towards implementing typical digital circuits in FPGAs
Be able to transfer the knowledge and practical skills learnt on specific EDA tools to other EDA tools that they may find; Showing capability of exploring knowledge in reconfigurable systems required by the industry
| Type | Timing | Weighting |
|---|---|---|
| Coursework | 100.00% | |
| Coursework components. Weighted as shown below. | ||
| Report | T2 Week 11 | 100.00% |
Timing
Submission deadlines may vary for different types of assignment/groups of students.
Weighting
Coursework components (if listed) total 100% of the overall coursework weighting value.
| Term | Method | Duration | Week pattern |
|---|---|---|---|
| Spring Semester | Laboratory | 4 hours | 11111111111 |
How to read the week pattern
The numbers indicate the weeks of the term and how many events take place each week.
Dr Leonardo Garcia Garcia
Assess convenor
/profiles/456232
Please note that the University will use all reasonable endeavours to deliver courses and modules in accordance with the descriptions set out here. However, the University keeps its courses and modules under review with the aim of enhancing quality. Some changes may therefore be made to the form or content of courses or modules shown as part of the normal process of curriculum management.
The University reserves the right to make changes to the contents or methods of delivery of, or to discontinue, merge or combine modules, if such action is reasonably considered necessary by the University. If there are not sufficient student numbers to make a module viable, the University reserves the right to cancel such a module. If the University withdraws or discontinues a module, it will use its reasonable endeavours to provide a suitable alternative module.